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--- top190520 [2019/05/20 07:40]
gongyu
+++ top190520 [2019/05/21 14:35] (当前版本)
gongyu
@@ 行 1: / 行 1: @@
 #### 今日推荐：RISC-V在FPGA系统上的移植和功能演示扩展板
-RISC-V在FPGA系统上的移植和功能演示
 ---
@@ 行 92: / 行 90: @@
 #### 实施计划：
-### 项目实施
----
-#### PCB设计
-#### PCB制造
-#### PCB焊接、调试
-#### FPGA连接和Verilog编程
-#### 系统测试
 ### 项目答辩
@@ 行 151: / 行 139: @@
 ...更新中...
- #### 设计文件
-.PCB版本1：
-郭子钰：[[https://pan.baidu.com/s/1XnYNHuOvZgiECSqdgCkS5w |原理图+PCB 提取码5n4p]]，{{:undefined:demo9_key_debounce.zip|flash验证代码}}
-PCB版本2：
-卢凯丽：原理图  {{:task3_5_13.pdf|}}
-.
+#### 设计文件
+  * PCB版本1：郭子钰：[[https://pan.baidu.com/s/1XnYNHuOvZgiECSqdgCkS5w |原理图+PCB 提取码5n4p]]，{{:undefined:demo9_key_debounce.zip|flash验证代码}}
+  * PCB版本2：卢凯丽：原理图  {{:task3_5_13.pdf|}}
@@ 行 171: / 行 156: @@
 ---
 #### 学习顺序
   - 熟悉Intel Cyclone FPGA、Quartus Prime软件(Lattice MXO2 FPGA、Diamond软件)及FPGA设计流程
@@ 行 179: / 行 165: @@
   - 尝试修改Reindeer Arduino IDE固件并测试
   - 分工：
-  * RISC－V的验证和仿真的改进
+    * RISC－V的验证和仿真的改进
-  * 设计基于STEP CYC10的功能扩展板以演示RISC-V系统
+    * 设计基于STEP CYC10的功能扩展板以演示RISC-V系统
-  * sketch for DRAM test
+    * sketch for DRAM test
-  * Makefile for RISC-V
+    * Makefile for RISC-V
-#### FPGA
+#### FPGA相关资源
 ##### 硬件平台
@@ 行 193: / 行 179: @@
 ##### 参考文档
- - [1]   Intel Cyclone 10 LP Device Overview (C10LP51001), Intel Corporation, 05/08/2017
+  * RISC-V
- - [2]   Intel Cyclone 10 LP Device Datasheet (C10LP51002), Intel Corporation, 05/07/2018
+    - Reindeer RISC-V CPU软核[[https://github.com/PulseRain/Reindeer|Reindeer]]及[[https://github.com/PulseRain/Reindeer_Step|Reindeer_Step]]
- - [3]   Intel Cyclone 10 LP Core Fabric and General Purpose I/Os Handbook (C10LP51003), Intel Corporation, 01/24/2019
+    - RISC-V from Wikipedia (https://en.wikipedia.org/wiki/RISC-V)
- - [4]   UltraFast High-Level Productivity Design Methodology Guide, UG1197 (v2018.3) , Xilinx Inc., December 5, 2018
+    - JEDEC from Wikipedia (https://en.wikipedia.org/wiki/JEDEC)
- - [5]   Building Embedded Systems, Programmable Hardware, Changyi Gu, Apress Media LLC, 02/2016
+  * Reindeer RISC-V CPU移植
- - [6]   Synchronous Resets? Asynchronous Resets? I am so confused! How will I ever know which to use?, Clifford E. Cummings and Don Mills, SNUG (Synopsys Users Group) San Jose, 2002
+    - [[http://www.stepfpga.com/doc/reindeer_step|在小脚丫FPGA板上玩转开源农场（FARM）——FPGA+Arduino+RISC-V+Make]]
- - [7]   Asynchronous & Synchronous Reset Design Techniques - Part Deux, Clifford E. Cummings, Don Mills, Steve Golson, SNUG Boston 2003
+    - [[http://www.stepfpga.com/doc/fpga_arduino_8051|基于FPGA使用Arduino编程的8051软核FP51-1T]]
- - [8]   A Review on Clock Gating Methodologies for power minimization in VLSI circuits， Harpreet Singh1, Dr. Sukhwinder Singh， International Journal of Scientific Engineering and Applied Science (IJSEAS) – Volume-2, Issue-1, January 2016
- - [9]   Crossing the abyss: asynchronous signals in a synchronous world, By Mike Stein, Paradigm Works, EDN Magazine, Jul 24, 2003
- - [10]  Keep metastability from killing your digital design, by Debora Grosse, Unisys, EDN Magazine, June 23, 1994
- - [11]  Practical design for transferring signals between clock domains, By Michael Crews and Yong Yuenyongsgool, Philips Semiconductors, EDN Magazine, Feb 20, 2003
- - [12]  Simulation and Synthesis Techniques for Asynchronous FIFO Design, Rev 1.2, Clifford E. Cummings, Sunburst Design, Inc., SNUG (Synopsys User Group Conference), San Jose, 2002
- - [13]  CMOS Digital Integrated Circuits - Analysis and Design (3rd Edition), Sung-Mo Kang, Yusuf Leblebici, McGraw-Hill Higher Education, 2003
- - [14]  Intel 8080 Microcomputer Systems user's Manual, Sep 1975
- - [15]  MC6800 8-bit Microprocessing Unit (MPU), Motorola Semiconductor Products Inc. 1984
- - [16]  M6800 Programming Reference Manual 1st Edition, Motorola, Inc. 1976
- - [17]  Verilog Digital Computer Design - Algorithms into Hardware, Mark Gordon Arnold, University of Wyoming, Prentice Hall PTR, 1999
-#### RISC-V
- - Reindeer RISC-V CPU软核[[https://github.com/PulseRain/Reindeer|Reindeer]]及[[https://github.com/PulseRain/Reindeer_Step|Reindeer_Step]]
- - [1]   RISC-V from Wikipedia (https://en.wikipedia.org/wiki/RISC-V)
- - [12]  JEDEC from Wikipedia (https://en.wikipedia.org/wiki/JEDEC)
-#### Reindeer RISC-V CPU移植
- - [[http://www.stepfpga.com/doc/reindeer_step|在小脚丫FPGA板上玩转开源农场（FARM）——FPGA+Arduino+RISC-V+Make]]
- - [[http://www.stepfpga.com/doc/fpga_arduino_8051|基于FPGA使用Arduino编程的8051软核FP51-1T]]
+---
+关于硬禾实战营研究生技能培训更多的实战项目信息，参见[[handsontraining|硬禾实战营研究生技能培训项目第一期]]