差别
这里会显示出您选择的修订版和当前版本之间的差别。
| 两侧同时换到之前的修订记录 前一修订版 后一修订版 | 前一修订版 | ||
|
stepfpgaboard [2019/04/24 08:39] gongyu |
stepfpgaboard [2019/04/24 09:44] (当前版本) gongyu |
||
|---|---|---|---|
| 行 1: | 行 1: | ||
| - | #### 可编程逻辑器件 - PLD/FPGA | ||
| - | |||
| - | --- | ||
| - | |||
| - | ### 器件 | ||
| - | ^器件系列|类型 | 厂商 | 逻辑资源 | 内部块存储 | 时钟 | 内部硬核 | 乘法器 | I/O |编译系统 | | ||
| - | ^ICE | [[PLD]]|[Lattice](http://www.latticesemi.com) | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | ^XO | PLD/[[FPGA]]|[Lattice](http://www.latticesemi.com) | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | ^ECP | [[FPGA]]|[Lattice](http://www.latticesemi.com)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | ^ | ||
| - | ^MAX II |[[PLD]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^MAX V | [[PLD]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^MAX 10 |[[PLD]]/[[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Cyclone V | [[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Cyclone 10 |[[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Arria V | [[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Arria 10 |[[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Stratix V | [[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Stratix 10 | [[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Agilex | [[FPGA]]|[Altera/Intel](https://www.intel.com/content/www/us/en/products/programmable.html)| 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^ | ||
| - | ^Agilex | PLD/FPGA|Altera/Intel | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Agilex | PLD/FPGA|Altera/Intel | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Agilex | PLD/FPGA|Altera/Intel | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Quartus II| | ||
| - | ^Agilex | PLD/FPGA|Altera/Intel | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | ^Agilex | PLD/FPGA|Altera/Intel | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | ^Agilex | PLD/FPGA|Lattice | 96Kb | 92Kb | PLL（2）|SPI、I2C、Timer | |DDR3|Diamond| | ||
| - | |||
| - | |||
| - | |||
| - | ### 开发板 | ||
| - | |||
| - | |||
| - | ### IP核 | ||
| - | |||
| - | \\ | ||
| - | |||
| ####小脚丫FPGA开发板 | ####小脚丫FPGA开发板 | ||