GPSDO: A (very poor) GPS Disciplined 1MHz oscillator
CORDIC: Calculating SIN and COS using only addition and bit shifts
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STGL5000: Configuring the SGTL5000 low-power audio codec
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MMCM_reset: Dynamically reconfigure the 7-series MMCM block
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TinyTx: Making a really tiny serial TX
GigabitTX: Sending data from a 10/100/1000 Ethernet Port
ArtyEthernet: Sending data on the Digilent Arty's 10/100 Ethernet Port
Morse: Transmit Morse code with the Arty
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MIC and AMP: Adding a Microphone to the PMODamp3 design
PMODamp3: Driving an Class D I2S power amp module
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Single Step: A way to allow switching to a single-step clock in Spartan 6
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HDMI Capture: Capturing HDMI data and sending it to the serial port
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EDID ROM: An basic EDID for a video project
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Square root: Calculating the integer square root of a number
Artix 7 1080p: Seeing if the Artix-7 can generate 1080p, with a little over-clocking
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hwopensource: Getting data from a PmodMIC3 - A MEM Smicrophone and 12-bit ADC
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hwopensource: Reading an analog joystick with the PmodAD1 (Analog Devices AD7476 ADC)
hwopensource: Using the serial interface on the PmodMAXSONAR module
hwopensource: A super-light-weight 9 bits per pixel DVI-D interface
hwopensource: Writing your logic design into the board's SPI configuration FLASH
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hwopensource: First bringup of the Scarab Hardware miniSpartan6+ board
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Simple resets don't work Showing how not to implement a reset
DDS via a VGA port Analysing how well a VGA port can generate a 6.25
MHz frequency sine wave
Inferred FIFO Implementing a FIFO to avoid using IP
Cheap Analogue Input Reading an analogue joystick without a ADC
HDMI Input Receiving high-speed digital video (DVI-D over HDMI)
Intelligent LEDs Driving Intelligent LEDs
SDRAM Audio playback Playing back extended audio from SDRAM
FPGA wheelchair fairy lights LED lights for my boy's wheelchair
Accessing the configuration clock Using the internal oscillator
High Speed Frequency Counter Counting the fastest of clocks
DVI-D Serdes Creating a DVI-D signal using the OSERDES2 Serializers
SD card testing Playing around with the SPI interface on an SD card
Logic Analyser Test An 8-bit 200MHz counter to test a Logic Analyser
Eternity2 Solver Using an FPGA to solve the Eternity II puzzle
Zedboard Audio Using the I2S Audio codec on the Zedboard from VHDL
Reflow Oven Solder reflow using an benchtop oven and a FPGA
FIR Filter Implementing a FIR filter in an FPGA
Solid State Relay Driving a SSR from the a FPGA
Analog Wing Using the Papilio Analogue Wing
Thermocouple demo Capturing data using a Adafruit Thermocouple interface
Simple SDRAM Controller A very simple SDRAM controller
ZedboardVGAHDMI “Driving the Zedboard's VGA and HDMI interface, at one clock per Pixel
Includes RGB444 to YCbCr conversion”
ZedboardHDMIv2 Driving the Zedboard's HDMI interface
pmodi2s Driving a Digilent PMODI2S Audio DAC
pmodenc Decoding the input from the Digitent PMODENC rotary encoder
mainshumfilter A low-pass DSP filter removing 50Hz hum from an ADC's samples
a2dgraph Slowly graphing channel 0 on the LogicStart's ADC
- DSPFilterDesign Various bits and bobs for FIR filter design
- I3C2 An Intelligent I2C Controller
- Audio filter Simulating a passive analogue audio filter
- Dualhead MCB Frame Buffer Adding a DVI-D output to the MCB Frame Buffer
- MCB Frame Buffer Creating a 720p frame buffer in the Pipistrello's LPDDR memory
- USB TTL RS232 Using the Papilio as a TTL RS232 adapter
- Spartan 6 1080p Generating 1080p on a Spartan 6 LX
- High Speed Link High speed transfer between two FPGAs
- RS232dumper Capture then dump data to the RS232 port
ZedboardHDMI Driving the Zedboard's HDMI interface
- ZedboardOV7670 Attaching a low cost camera to the Zedboard
AsyncVGA A VGA Controller that works with bursts of data (e.g. from SDRAM)
- FreqSwitch CHanging a DCMCLKGEN's output “on the fly” to generate different frequencies
FMSOS Send SOS with a simple FM transmitter
- OV7670camera Video capture from a cheap camera module
Digilent EPP Performance Performance difference in the EPP port speed on digilent boards
OSERDES2 clocking Setting up the clocking infrastructure for high speed serial output
frequencycounter GPS referenced frequency counter
- hidefsnow Generate static in 1080p
configflash Storing arbitrary data in the configuration flash
- asyncreset Testing async reset reliability
metatest Testing for metastability
- if vs case Testing different implementations
- raycast A “ray casting” 3D maze walk through
dxdisplay Driving a Deal Extreme TM1638 7 Seg Display
- Synth A simple all-digital Synth, in bite sized parts
- Crystal Castles Reimplementing the old arcade machine on an FPGA
- CheapScope A simple fabric embedded logic analyser, with and RS232 interface
- dvidtest Driving a DVI-D interface from a Spartan 6 FPGA
HDlife Implementing Conway's Game of Life at full HD
FPGAheli Controlling an Infrared Helicopter
shortwave A very quick and dirty shortwave transmitter
AVR8 core An AVR103 nearly compatible soft core originally from OpenCores
10BaseT-TX Sending out Ethernet packets directly from the FPGA
SPDIFInput Capturing and converting digital audio data from DVD players
- SPDIFout Generating digital audio data output
SPDIFVolume A simple digital volume control for a S/PDIF signal - a very simple DSP
- SPDIFThru A passthrough for S/PDIF singal - a base for DSP projects
VGA Display Generating the timings for 1440×900 VGA output
WavePlay Playing 8bit stereo audio samples from Block RAM
Mandelbrot Yet another FPGA Mandelbrot viewer
DSPfract Yet another FPGA Mandelbrot viewer - this time using Spartan 6 DSP48A bocks
Radix2div Radix 2 division in VHDL
Radix4div Radix 4 division in VHDL
SDRAM Memory Controller Memory controller for the SDRAM chip on the Terasic DE0-nano
uClinux Bringing up uClinux on a Terasic DE0-nano board
MAF6502 A FPGA implementation of the classic MOS6502 processor
Papilio Plus/Pacman Building the Pacman implementation from
http://fpgaarcade.com on the Spartan 6 hardware
Papilio Plus/Fading counter A softly fading binary counter
Papilio Plus/PS2 Keyboard Using the PS/2 keyboard interface
Papilio Plus/SRAM test 2 writes and verifies test patterns in the SRAM on the Papilio Plus @ 100MHz
CUGA-1 A CPU Using Gate Arrays