1. GPSDO: A (very poor) GPS Disciplined 1MHz oscillator
  2. CORDIC: Calculating SIN and COS using only addition and bit shifts
  3. HDMI header error correction: One of the error checking and correcting codes used in HDMI
  4. High_performance_FIR: A high performance FIR filter for Spartan 6
  5. DigitalClock: Working on a design for a digital clock
  6. STGL5000: Configuring the SGTL5000 low-power audio codec
  7. Combination Lock: A four-digit combination lock for the Basys-3
  8. MMCM_reset: Dynamically reconfigure the 7-series MMCM block
  9. Simple AXI Slave: An AXI slave for Zynq's ARM CPUs
  10. myStorm Blackice: First project with an Open Source FPGA toolset
  11. TinyTx: Making a really tiny serial TX
  12. GigabitTX: Sending data from a 10/100/1000 Ethernet Port
  13. ArtyEthernet: Sending data on the Digilent Arty's 10/100 Ethernet Port
  14. Morse: Transmit Morse code with the Arty
  15. Synchronizer: The right way to synchronize an input signal
  16. MIC and AMP: Adding a Microphone to the PMODamp3 design
  17. PMODamp3: Driving an Class D I2S power amp module
  18. Virtual IO: Using the Vivado Debug Virtual IP
  19. MPU6050 sensor RTL: Using a Gyro / Acceleration / Attitude sensor directly in RTL
  20. Single Step: A way to allow switching to a single-step clock in Spartan 6
  21. XADC Fan PWM: Using the 7-series XADC to control fan speed
  22. Minimal XADC design: Reading an input from the on-FPGA ADX on the Basys3
  23. Better rotary encoder input: My early attempt at quadrature decoding wasn't that good
  24. Genesys2 Mandelbrot: Port of the Artix-7 Fractal viewer to the Kintex-7 on the Genesys2
  25. DisplayPort: A DisplayPort interface
  26. HDMI Capture: Capturing HDMI data and sending it to the serial port
  27. HDMI Processing: HDMI Video and Audio extraction on an Artix 7 board
  28. EDID ROM: An basic EDID for a video project
  29. SERDES symbol locking: How to find a working bitslip / input delay setting for 7-series ISERDES
  30. Artix 7 1080p passthrough: Passing HDMI signals through the Nexys Video
  31. Square root: Calculating the integer square root of a number
  32. Artix 7 1080p: Seeing if the Artix-7 can generate 1080p, with a little over-clocking
  33. Mandelbrot NG 1080i: A full-HD on the fly Mandelbrot Fractal viewer for the Nexys Video
  34. GPS Spew: A desktop GPS jammer
  35. hwopensource: Getting data from a PmodMIC3 - A MEM Smicrophone and 12-bit ADC
  36. hwopensource: Creating a ring oscillator in an FPGA
  37. hwopensource: Reading an analog joystick with the PmodAD1 (Analog Devices AD7476 ADC)
  38. hwopensource: Using the serial interface on the PmodMAXSONAR module
  39. hwopensource: A super-light-weight 9 bits per pixel DVI-D interface
  40. hwopensource: Writing your logic design into the board's SPI configuration FLASH
  41. hwopensource: Playing beeps
  42. hwopensource: First bringup of the Scarab Hardware miniSpartan6+ board
  43. hwopensource A digital clock that doesn't know how to add!
  44. hwopensource Interfacing a low-cost sonar module to an FPGA
  45. Simple resets don't work Showing how not to implement a reset
  46. DDS via a VGA port Analysing how well a VGA port can generate a 6.25 MHz frequency sine wave
  47. Inferred FIFO Implementing a FIFO to avoid using IP
  48. Cheap Analogue Input Reading an analogue joystick without a ADC
  49. HDMI Input Receiving high-speed digital video (DVI-D over HDMI)
  50. Intelligent LEDs Driving Intelligent LEDs
  51. SDRAM Audio playback Playing back extended audio from SDRAM
  52. FPGA wheelchair fairy lights LED lights for my boy's wheelchair
  53. Accessing the configuration clock Using the internal oscillator
  54. High Speed Frequency Counter Counting the fastest of clocks
  55. DVI-D Serdes Creating a DVI-D signal using the OSERDES2 Serializers
  56. SD card testing Playing around with the SPI interface on an SD card
  57. Logic Analyser Test An 8-bit 200MHz counter to test a Logic Analyser
  58. Eternity2 Solver Using an FPGA to solve the Eternity II puzzle
  59. Zedboard Audio Using the I2S Audio codec on the Zedboard from VHDL
  60. Reflow Oven Solder reflow using an benchtop oven and a FPGA
  61. FIR Filter Implementing a FIR filter in an FPGA
  62. Solid State Relay Driving a SSR from the a FPGA
  63. Analog Wing Using the Papilio Analogue Wing
  64. Thermocouple demo Capturing data using a Adafruit Thermocouple interface
  65. Simple SDRAM Controller A very simple SDRAM controller
  66. ZedboardVGAHDMI “Driving the Zedboard's VGA and HDMI interface, at one clock per Pixel
  67. Includes RGB444 to YCbCr conversion”
  68. ZedboardHDMIv2 Driving the Zedboard's HDMI interface
  69. pmodi2s Driving a Digilent PMODI2S Audio DAC
  70. pmodenc Decoding the input from the Digitent PMODENC rotary encoder
  71. mainshumfilter A low-pass DSP filter removing 50Hz hum from an ADC's samples
  72. a2dgraph Slowly graphing channel 0 on the LogicStart's ADC - DSPFilterDesign Various bits and bobs for FIR filter design - I3C2 An Intelligent I2C Controller - Audio filter Simulating a passive analogue audio filter - Dualhead MCB Frame Buffer Adding a DVI-D output to the MCB Frame Buffer - MCB Frame Buffer Creating a 720p frame buffer in the Pipistrello's LPDDR memory - USB TTL RS232 Using the Papilio as a TTL RS232 adapter - Spartan 6 1080p Generating 1080p on a Spartan 6 LX - High Speed Link High speed transfer between two FPGAs - RS232dumper Capture then dump data to the RS232 port
  73. ZedboardHDMI Driving the Zedboard's HDMI interface - ZedboardOV7670 Attaching a low cost camera to the Zedboard
  74. AsyncVGA A VGA Controller that works with bursts of data (e.g. from SDRAM) - FreqSwitch CHanging a DCMCLKGEN's output “on the fly” to generate different frequencies
  75. FMSOS Send SOS with a simple FM transmitter - OV7670camera Video capture from a cheap camera module
  76. Digilent EPP Performance Performance difference in the EPP port speed on digilent boards
  77. OSERDES2 clocking Setting up the clocking infrastructure for high speed serial output
  78. frequencycounter GPS referenced frequency counter - hidefsnow Generate static in 1080p
  79. configflash Storing arbitrary data in the configuration flash - asyncreset Testing async reset reliability
  80. metatest Testing for metastability - if vs case Testing different implementations - raycast A “ray casting” 3D maze walk through
  81. dxdisplay Driving a Deal Extreme TM1638 7 Seg Display - Synth A simple all-digital Synth, in bite sized parts - Crystal Castles Reimplementing the old arcade machine on an FPGA - CheapScope A simple fabric embedded logic analyser, with and RS232 interface - dvidtest Driving a DVI-D interface from a Spartan 6 FPGA
  82. HDlife Implementing Conway's Game of Life at full HD
  83. FPGAheli Controlling an Infrared Helicopter
  84. shortwave A very quick and dirty shortwave transmitter
  85. AVR8 core An AVR103 nearly compatible soft core originally from OpenCores
  86. 10BaseT-TX Sending out Ethernet packets directly from the FPGA
  87. SPDIFInput Capturing and converting digital audio data from DVD players - SPDIFout Generating digital audio data output
  88. SPDIFVolume A simple digital volume control for a S/PDIF signal - a very simple DSP - SPDIFThru A passthrough for S/PDIF singal - a base for DSP projects
  89. VGA Display Generating the timings for 1440×900 VGA output
  90. WavePlay Playing 8bit stereo audio samples from Block RAM
  91. Mandelbrot Yet another FPGA Mandelbrot viewer
  92. DSPfract Yet another FPGA Mandelbrot viewer - this time using Spartan 6 DSP48A bocks
  93. Radix2div Radix 2 division in VHDL
  94. Radix4div Radix 4 division in VHDL
  95. SDRAM Memory Controller Memory controller for the SDRAM chip on the Terasic DE0-nano
  96. uClinux Bringing up uClinux on a Terasic DE0-nano board
  97. MAF6502 A FPGA implementation of the classic MOS6502 processor
  98. Papilio Plus/Pacman Building the Pacman implementation from http://fpgaarcade.com on the Spartan 6 hardware
  99. Papilio Plus/Fading counter A softly fading binary counter
  100. Papilio Plus/PS2 Keyboard Using the PS/2 keyboard interface
  101. Papilio Plus/SRAM test 2 writes and verifies test patterns in the SRAM on the Papilio Plus @ 100MHz
  102. CUGA-1 A CPU Using Gate Arrays