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digital_logic_tutorial [2021/09/11 18:31] gongyusu [2 数制及编码] |
digital_logic_tutorial [2021/09/13 11:14] (当前版本) gongyusu |
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## 数字电路教程 | ## 数字电路教程 | ||
- | |||
- | ### 1 入门方法 | ||
- | - [[why2learndigitalcircuits|我们身处的“数字逻辑”世界]] | ||
- | - [[how2learndigitalcircuits|数字电路学习的方法]] | ||
- | - [[FPGA|如何使用FPGA]] | ||
- | |||
### 2 数制及编码 | ### 2 数制及编码 | ||
学习的主要要点: | 学习的主要要点: | ||
- | * 数制、编码的基本概念 | + | * 数制、[[code_system|编码]]的基本概念 |
* 常用数制及其转换 | * 常用数制及其转换 | ||
* 常用二进制编码及BCD码 | * 常用二进制编码及BCD码 | ||
教学要求: | 教学要求: | ||
- | * 了解数制、码制的基本概念; | + | * 了解数制、[[code_system|码制]]的基本概念; |
* 掌握常用数制(二进制、八进制、十进制、十六进制)及其转换方法; | * 掌握常用数制(二进制、八进制、十进制、十六进制)及其转换方法; | ||
* 了解常用的二进制码(自然二进制码、循环码、奇偶校验码)及BCD码(8421BCD码、5421BCD码、余3BCD码) | * 了解常用的二进制码(自然二进制码、循环码、奇偶校验码)及BCD码(8421BCD码、5421BCD码、余3BCD码) | ||
行 44: | 行 38: | ||
- [[https://www.electronicshub.org/introduction-to-logic-gates/|数字门介绍]] | - [[https://www.electronicshub.org/introduction-to-logic-gates/|数字门介绍]] | ||
- | - [[https://www.electronicshub.org/digital-logic-not-gate/|逻辑非门]] | + | - [[not_gate/|逻辑非门]] |
- | - [[https://www.electronicshub.org/digital-logic-or-gate/|逻辑或门]] | + | - [[or_gate/|逻辑或门]] |
- | - [[https://www.electronicshub.org/digital-logic-and-gate/|逻辑与门]] | + | - [[and_gate/|逻辑与门]] |
- | - [[https://www.electronicshub.org/universal-gates-nand-gate/|与非门]] | + | - [[nand_gate/|与非门]] |
- | - [[https://www.electronicshub.org/universal-gates-nor-gate/|或非门]] | + | - [[nor_gate/|或非门]] |
- | - [[https://www.electronicshub.org/exclusive-or-gatexor-gate/|异或门]] | + | - [[xor_gate/|异或门]] |
- [[https://www.electronicshub.org/exclusive-nor-gate/|异非或门]] | - [[https://www.electronicshub.org/exclusive-nor-gate/|异非或门]] | ||
行 63: | 行 57: | ||
- [[https://www.electronicshub.org/k-map-karnaugh-map/|Karnaugh Map or K-Map]] | - [[https://www.electronicshub.org/k-map-karnaugh-map/|Karnaugh Map or K-Map]] | ||
+ | ### 4 组合逻辑电路 | ||
+ | 学习要点: | ||
+ | * SSI组合电路的分析及设计 | ||
+ | * MSI组合电路(编码器、译码器、数据选择器、数据比较器、加法器)及其应用 | ||
+ | * 组合电路的竞争冒险及消除方法 | ||
+ | 教学中的要求: | ||
+ | * 掌握SSI组合电路的分析方法及双轨输入条件下的设计方法 | ||
+ | * 了解MSI组合电路编码器、译码器、数据选择器、数据比较器、加法器的功能 | ||
+ | * 账务用MSI组合电路数据选择器、数据比较器、加法器实现组合逻辑设计的方法 | ||
+ | * 了解组合电路中的竞争冒险现象 | ||
+ | * 掌握增加多余项消除逻辑冒险的方法 | ||
+ | * 了解取样法消除冒险的方法 | ||
- | ### 4 组合逻辑电路 | + | 主要功能 |
+ | * [[digital_logic_encoder|编码器]] | ||
+ | * [[digital_logic_decoder|译码器]] | ||
+ | * [[data_selector|数据选择器]] | ||
+ | * [[data_comparator|数据比较器]] | ||
+ | * [[full_adder|全加器]] | ||
* [[https://www.electronicshub.org/introduction-to-combinational-logic-circuits/|组合逻辑电路介绍]] | * [[https://www.electronicshub.org/introduction-to-combinational-logic-circuits/|组合逻辑电路介绍]] | ||
* [[https://www.electronicshub.org/binary-adder-and-subtractor/|二进制加减法]] | * [[https://www.electronicshub.org/binary-adder-and-subtractor/|二进制加减法]] | ||
* [[https://www.electronicshub.org/carry-look-ahead-adder/|超前进位加法]] | * [[https://www.electronicshub.org/carry-look-ahead-adder/|超前进位加法]] | ||
* [[https://www.electronicshub.org/binary-multiplication/|二进制乘法器]] | * [[https://www.electronicshub.org/binary-multiplication/|二进制乘法器]] | ||
- | * [[https://www.electronicshub.org/binary-encoder/|二进制编码器]] | ||
- | * [[https://www.electronicshub.org/priority-encoder/|优先编码器]] | ||
- | * [[https://www.electronicshub.org/bcd-7-segment-led-display-decoder-circuit/|BCD到7段数码管显示]] | ||
* [[https://www.electronicshub.org/multiplexerandmultiplexing/|复用器]] | * [[https://www.electronicshub.org/multiplexerandmultiplexing/|复用器]] | ||
* [[https://www.electronicshub.org/demultiplexerdemux/|解复用]] | * [[https://www.electronicshub.org/demultiplexerdemux/|解复用]] | ||
- | * [[https://www.electronicshub.org/digital-comparator-and-magnitude-comparator/|数字比较器]] | ||
* [[https://www.electronicshub.org/parity-generator-and-parity-check/|奇偶校验生成器和奇偶校验]] | * [[https://www.electronicshub.org/parity-generator-and-parity-check/|奇偶校验生成器和奇偶校验]] | ||
行 95: | 行 102: | ||
- [[https://www.electronicshub.org/sequential-circuits-basics/|时序电路基础]] | - [[https://www.electronicshub.org/sequential-circuits-basics/|时序电路基础]] | ||
- | - [[https://www.electronicshub.org/latches/|锁存器]] | + | - [[latches|锁存器]] |
- | - [[https://www.electronicshub.org/flip-flops/|触发器]] | + | - [[flip-flops|触发器]] |
- | - [[https://www.electronicshub.org/sr-flip-flop-design-with-nor-and-nand-logic-gates/|SR触发器]] | + | - [[sr_flip-flop|SR触发器]] |
- | - [[https://www.electronicshub.org/jk-flipflop/|JK触发器]] | + | - [[jk_flipflop|JK触发器]] |
- | - [[https://www.electronicshub.org/d-flip-flop/|D触发器]] | + | - [[d_flip-flop|D触发器]] |
- | - [[https://www.electronicshub.org/t-flip-flop/|T触发器]] | + | - [[t_flip-flop|T触发器]] |
- [[https://www.electronicshub.org/flip-flop-conversions/|触发器转换]] | - [[https://www.electronicshub.org/flip-flop-conversions/|触发器转换]] | ||
- [[https://www.electronicshub.org/flip-flop-applications/|触发器应用]] | - [[https://www.electronicshub.org/flip-flop-applications/|触发器应用]] | ||
行 113: | 行 120: | ||
* [[https://www.electronicshub.org/ic-4017-decade-counter/|4017 Decade Counter and LED Sequencer]] | * [[https://www.electronicshub.org/ic-4017-decade-counter/|4017 Decade Counter and LED Sequencer]] | ||
- | ### 7. FPGA设计和硬件描述语言 | ||
- | * FPGA入门介绍 | ||
- | * [[https://www.fpga4fun.com/FPGAinfo1.html|FPGA是什么?]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo2.html|FPGA是如何工作的?]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo3.html|FPGA内部存储器]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo4.html|FPGA的管脚]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo5.html|时钟和全局信号线]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo6.html|下载线]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo7.html|配置]] | ||
- | * [[https://www.fpga4fun.com/FPGAinfo8.html|更多信息]] | ||
- | * FPGA软件 | ||
- | * [[https://www.fpga4fun.com/FPGAsoftware1.html|设计软件]] | ||
- | * [[https://www.fpga4fun.com/FPGAsoftware2.html|设计输入]] | ||
- | * [[https://www.fpga4fun.com/FPGAsoftware3.html|仿真]] | ||
- | * [[https://www.fpga4fun.com/FPGAsoftware4.html|管脚分配]] | ||
- | * [[https://www.fpga4fun.com/FPGAsoftware5.html|综合和布局布线]] | ||
- | * FPGA相关的电子技术 | ||
- | * SMD技术 | ||
- | * 晶体和晶振 | ||
- | * 快速入门指导 | ||
- | * Diamond | ||
- | * Quartus-II | ||
- | * 参考资源 | ||
- | * 论坛 | ||
- | * 链接 | ||
- | * HDL信息 | + | ## 数字系统设计部分 |
- | * [[https://www.fpga4fun.com/HDLtutorials.html|HDL教程]] | + | |
- | * [[https://www.fpga4fun.com/VerilogTips.html|Verilog要点]] | + | |
- | * [[https://www.fpga4fun.com/VHDLTips.html|VHDL要点]] | + | |
- | * Verilog语言简介 | + | |
- | * Verilog建模方式 | + | |
- | * Verilog代码实例 | + | |
- | ## 数字系统设计 | + | ### 7. 运算方法和运算部件 |
- | ### 运算方法和运算部件 | + | |
* 基本运算部件 | * 基本运算部件 | ||
* 定点数运算 | * 定点数运算 | ||
* 浮点数运算 | * 浮点数运算 | ||
* FPGA功能块 | * FPGA功能块 | ||
- | ### 指令系统 | + | |
+ | ### 8. 指令系统 | ||
在机器语言程序所运行的计算机硬件和上层软件之间的一座桥梁,是软件和硬件之间接口的完整定义 | 在机器语言程序所运行的计算机硬件和上层软件之间的一座桥梁,是软件和硬件之间接口的完整定义 | ||
* 指令系统概述 | * 指令系统概述 | ||
* 指令系统设计 | * 指令系统设计 | ||
* 指令系统实例 - RISC-V架构 | * 指令系统实例 - RISC-V架构 | ||
- | ### 中央处理器 | + | |
+ | ### 9. 中央处理器 | ||
* CPU概述 | * CPU概述 | ||
* 单周期CPU设计 | * 单周期CPU设计 | ||
行 165: | 行 142: | ||
* 流水线冒险及处理 | * 流水线冒险及处理 | ||
* 高级流水线技术 | * 高级流水线技术 | ||
- | ### 存储器层次结构 | + | |
+ | ### 10. 存储器层次结构 | ||
* 存储器概述 | * 存储器概述 | ||
* 主存储器的基本结构 | * 主存储器的基本结构 | ||
* 高速缓存存储器 | * 高速缓存存储器 | ||
* 虚拟存储器 | * 虚拟存储器 | ||
- | ### 系统互连与输入、输出 | + | |
+ | ### 11. 系统互连与输入、输出 | ||
* 外设与CPU和主存的互连 | * 外设与CPU和主存的互连 | ||
* I/O接口和I/O端口 | * I/O接口和I/O端口 | ||
行 187: | 行 166: | ||
* Sound Transducers | * Sound Transducers | ||
- | ### 控制与通信 | + | ### 12. 控制与通信 |
* GCD算法 | * GCD算法 | ||
* 整数平方根算法 | * 整数平方根算法 | ||
行 201: | 行 180: | ||
* Electronic System | * Electronic System | ||
* Negative Feedback Circuits | * Negative Feedback Circuits | ||
+ | |||
#### 通信系统 | #### 通信系统 | ||
- | ### 555定时器芯片 | + | ### 13. 555定时器芯片 |
* 555 timer theory | * 555 timer theory | ||
* Monostable multivibrator using 555 timer | * Monostable multivibrator using 555 timer |