集11种常用功能于一体的口袋仪器ADALM2000（M2K）

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## 1. AWG DAC

The Analog Devices AD9717 dual, low-power 14-bit TxDAC digital-to-analog converter is used to generate the wave (Fig. 15). The main features are:

• Power dissipation @ 3.3V, 2 mA output: 86 mW @ 125MS/s, sleep mode: <3 mW @ 3.3V
• Supply voltage: 1.8V to 3.3V
• SFDR to Nyquist: 84 dBc @ 1 MHz output, 75 dBc @ 10 MHz output
• AD9717 NSD @ 1 MHz output, 125MS/s, 2 mA: −151 dBc/Hz
• Differential current outputs: 1 mA to 4 mA
• CMOS inputs with single-port operation
• Output common mode: 0 to 1.2 V
• Small footprint, 40-lead LFCSP RoHS-compliant package

The parallel Data Bus and the SPI configuration bus are driven by the FPGA. The single ended 100 MHz clock is provided by the clock generator. External Vref1VAWG reference voltage is used. The output currents (IoutAWGxP and _N) are converted to voltages in the I/V stage. The Full Scale is set via the FSADJx pins (see Fig. 16). The ADG787 2.5Ω CMOS Low Power Dual 2:1 MUX/DEMUX is used to connect $text_r{set}}$ of either 8kΩ (for high gain) or 32kΩ (for low gain) from FSADJx pin to GND.

figure_15._dac

The ADG787 features:

• −3 dB bandwidth, 150 MHz
• Single-supply 1.8V to 5.5V operation
• Low on resistance: 2.5 Ω typical

figure_16._dac_-_gain_set

As shown in Fig. 17, the reference voltage for the AWG is generated by IC42 (ADR3412ARJZ). A divided version is provided to the DAC:

$$V_{ref1V\_AWG}=V_{ref1V2\_AWG} \cdot \frac{R_{41}}{R_{39}+{R_{41}}}=1V\label{28}\tag{28}$$

figure_17._dac_-_reference_voltages

Buffered versions are provided to the I/V stages and individually for each AWG channel to minimize crosstalk.

The Full Scale DAC output current is:

$$I_{outAWGFS}=32 \cdot \frac{V_{ref1V\_AWG}}{R_{set}}\label{29}\tag{29}$$

For high-gain:

$$I_{outAWGFS\_HG}=32 \cdot \frac{1V}{8k \Omega}=4mA\label{30}\tag{30}$$

For low-gain:

$$I_{outAWGFS\_HG}=32 \cdot \frac{1V}{32k \Omega}=1mA\label{31}\tag{31}$$

An AD5645R Quad 14-bit nanoDAC generates the offset voltages to add a DC component to the AWG output signal (Fig. 18). The same circuit also generates VSET+ USR and VSET- USR, used to set the +/- user supply voltages.

• Low power, smallest quad 14-bit nanoDAC

  • 2.7 V to 5.5 V power supply
  • Monotonic by design
  • Power-on reset to zero scale/midscale (important for starting the AWG with 0 DC component)

  figure_18._dac_-_offset_voltages_and_user_ps_setting

The Full Scale voltage of all IC43 outputs is:

$$V_{offAWGFS}=V_{SET\_USRFS}=V_{ref1V2AWG}=1.2V\label{32}\tag{32}$$

IC 15 in Fig. 19 converts the DAC output currents to a bipolar voltage.

Important AD8058 features:

• Low cost
• 325 MHz, −3 dB bandwidth (G = +1)
• 1000 V/μs slew rate
• Gain flatness: 0.1 dB to 28 MHz
• Low noise: 7 nV/√Hz
• Low power: 5.4 mA/amplifier typical @ 5 V
• Low distortion: −85 dBc@5MHz, RL=1kΩ
• Wide supply range from 3 V to 12 V
• Small packaging

$$V_{Audio}=I_{outAWGP} \cdot R_{148}-I_{outAWGN} \cdot R_{142}=$$ $$=( 1-2 \cdot \{ A_U \} ) \cdot I_{outAWGFS} \cdot R_{142}=\{ A_b \} \cdot I_{outAWGFS} \cdot R_{142}\label{33}\tag{33}$$

Where:

$$\left\{ {{A_U}} \right\} = \frac{D}{{{2^N}}} \in \left[ {\left. {0 \ldots 1} \right)} \right.;\; - \;normalized\;unipolar\;DAC\;input\;number$$

$$\left\{ {{A_B}} \right\} = \left( {1 - 2 \cdot \left\{ {{A_U}} \right\}} \right) \in \left[ {\left. { - 1 \ldots 1} \right)} \right.;\; - \;normalized\;bipolar\;DAC\;input\;number\;\left( {binary\;offset} \right)$$

$$D \in \left[ {\left. {0 \ldots {2^{14}}} \right)} \right. = \left[ {0 \ldots {2^{14}} - 1} \right];\; - \;integer\;unipolar\;DAC\;input\;number\label{34}\tag{34}$$

The Voltage range extends between:

$$ - V_{AudioFS} \le V_{Audio} < - V_{AudioFS}\label{35}\tag{35}$$

Where (for high gain, respectively, low gain):

$$V_{AudioFS\;HG}=I_{outAWGFS\;HG} \cdot R_{142}=496mV$$ $$V_{AudioFS\;LG}=I_{outAWGFS\;LG} \cdot R_{142}=124mV\label{36}\tag{36}$$

figure_19._awg_i_v_and_out

IC16 in Fig. 19 is the output stage of the AWG. AD8067 features:

• FET input: 0.6 pA input bias current
• Stable for gains ≥8 for High-Capacitive Load
• High speed: 54 MHz@−3 dB (G = +10)
• 640 V/µs slew rate
• Low noise:6.6 nV/√Hz; 0.6 fA/√Hz

  • Low offset voltage (1.0 mV max)
  • Rail-to-rail output
  • Low distortion: SFDR 95 dBc @ 1 MHz
  • Low power: 6.5 mA typical supply current
  • Low cost; Small packaging: SOT-23-5

  Matching the impedances in the inverting and non-inverting inputs of IC16:

$$\frac{1}{{{{\mathbf{R}}_{140}}}} + \frac{1}{{{{\mathbf{R}}_{141}}}} + \frac{1}{{{{\mathbf{R}}_{144}}}} = \frac{1}{{{{\mathbf{R}}_{147}}}} + \frac{1}{{{{\mathbf{R}}_{149}}}}\label{37}\tag{37}$$

$$V_{outAWG}=-V_{Audio} \cdot \frac{R_{141}}{R_{144}}+\left(2 \cdot V_{offAWG}-V_{ref1V2AWG}\right) \cdot \frac{R_{141}}{R_{140}}\label{38}\tag{38}$$

The first term in equation \ref{38} represents the actual wave amplitude, with a range of:

$$ - 5.45V < - 5V < V_{ACoutAWG\;HG} < 5V < 5.45V$$ $$ - 1.36V < - 1.25V < V_{ACoutAWG\;LG} < 1.25V < 1.36V\label{39}\tag{39}$$

Low-gain is used to generate low amplitude signals with improved accuracy. Any amplitude of the output signal is derivable by combining LowGain/HighGain setting (rough) with the digital signal amplitude (fine).

With the 14-bit DAC, the absolute resolution of the AWG AC component is:

$$at\;Low\;Gain:\;\;\;\frac{{2.72V}}{{{2^{14}}}} = 166\mu V$$ $$at\;High\;Gain:\;\;\;\;\frac{{10.9V}}{{{2^{14}}}} = 665\mu V\label{40}\tag{40}$$

The second term in equation \ref{38} shows the DC component (AWG offset), with a range of (for either LowGain or HighGain):

$$ - 5.5V < - 5V < V_{DCoutAWG} < 5V < 5.5V\label{41}\tag{41}$$

AD8067 is supplied with $\pm 5.5V$; to avoid saturation the user should keep the sum of AC and DC components in \ref{38} to:

$$ - 5.5V < - 5V < V_{outAWG} < 5V < 5.5V\label{42}\tag{42}$$

Only bolded ranges are used in equations \ref{39}, \ref{41}, and \ref{42}, for providing tolerance margins.

The R145 PTC thermistor provides thermal protection in case of an output shortcut.

将两个AWG通道合并起来可以生成立体声音频信号 (Fig. 20). AD8592 was used for its features:

• Single-supply operation: 2.5 V to 6 V

  • High output current: ±250 mA
  • Low shutdown supply current: 100 nA
  • Low supply current: 750 μA/Amp
  • Very low input bias current

  A single 3.3V supply is used.

$$V_{outIC18}=-2 \cdot V_{Audio}+1.5V\label{43}\tag{43}$$

The first term in equation \ref{43} is the audio signal. The second term is the common mode DC component, removed by AC coupling.
The audio signal range is:

$$V_{AudioJack}=-2 \cdot V_{Audio}$$ $$-992mV < V_{AudioJack} < 992mV \left( High\;Gain \right)$$ $$-248mV < V_{AudioJack} < 248mV \left( Low\;Gain \right)\label{44}\tag{44}$$

figure_20._audio

Figure 21 shows the typical spectral characteristic of the AWG. In the first experiment (up), a coax cable and a Digilent Discovery BNC adapter were used to connect the AWG signal to the Scope inputs. For the second experiment (down), the AWG was connected to the scope inputs via the Analog Discovery wire kit. The Analog Discovery 2 Scope hardware was considered a reference for the experiments above because it has preferred spectral characteristics to the AWG.
The Network Analyzer virtual instrument in WaveForms is used to perform synchronized signal synthesis and acquisition. It takes control of channel 1 of AWG and of both scope channels. Start/Stop frequencies are set to 100 Hz/25 MHz, respectively. Sinus amplitude is set to 1V. The characteristic is built in 100 steps. The 3dB bandwidth is 12 MHz with the coax cable and 9 MHz with the wire kit. The 0.5dB bandwidth is 4 MHz with the coax cable and 2.9 MHz with the wire kit. The 0.1dB is 1 MHz with the coax cable and 800 kHz with the wire kit.

figure_21._awg_spectral_characteristics._with_analog_discovery_bnc_adapter_and_bnc_cable_from_awg_to_scope_up_._with_the_wire_kit_down