## ADALM2000的特性和性能

This chapter shows the features and performances as described in the Analog Discovery 2 Datasheet. Footnotes add detailed information and annotate the HW description in this Manual.


### 1. 示波器模拟输入
  * Channels: 2
  * Channel type: differential((See note in section 2. Scope))
  * Resolution:	14-bit
  * Absolute Resolution(scale ≤0.5V/div((High Gain: ±2.6V differential input voltage range.))): 0.32mV
  * Absolute Resolution(scale≥1V/div((Low Gain: ±29V differential input voltage range.))):	3.58mV
  * Accuracy (scale≤0.5V/div, VinCM = 0V): ±10mV±0.5%
  * Accuracy (scale≥1V/div, VinCM = 0V): ±100mV±0.5%
  * CMMR (typical): ±0.5%
  * Sample rate (real time): 100MS/s
  * Input impedance: 1MΩ||24pF
  * Scope scales: 500uV to 5V/div((High Gain or Low Gain is used in the analog signal input path for rough scaling. “Digital Zooming” is used for multiple scope scales.))
  * Analog bandwidth with Discovery BNC adapter((The Scope bandwidth depends on probes. The Analog Discovery wire kit is an affordable, easy-to-use solution, but it limits the frequency, noise, and crosstalk performances (see [[analog_discovery_2:refmanual#figure_21|Figure 21]], down). With coax probes and Analog Discovery BNC adapter, the 0.5dB Scope bandwidth is 10 MHz (see Fig. 15).)): 30 MHz+ @ 3dB, 10 MHz @ 0.5dB, 5 MHz @ 0.1dB
  * Analog bandwidth with Wire Kit((The Scope bandwidth depends on probes. The Analog Discovery wire kit is an affordable, easy-to-use solution, but it limits the frequency, noise, and crosstalk performances (see [[analog_discovery_2:refmanual#figure_21|Figure 21]], down). With coax probes and Analog Discovery BNC adapter, the 0.5dB Scope bandwidth is 10 MHz (see Fig. 15).)): 9 MHz @ 3dB, 2.9 MHz @ 0.5dB, 0.8 MHz @ 0.1dB 
  * Input range: ±25V (±50V diff((As shown in Fig. 12, a ±50V differential input signal does not fit in a single scope screen (ADC range). However, Vertical Position setting allows visualization of either +50V or -50V levels.)))
  * Input protected to: ±50V;
  * Buffer size/channel: Up to 16k samples((Default Scope buffer size is 8kSamples/channel. The WaveForms Device Manager provides alternate FPGA configuration files, with different resource allocation. With no memory allocated to the Digital I/O and reduced memory assigned to the AWG, the scope buffer size can be chosen to be 16kSamples/channel.)) 
  * Triggering: edge, pulse, transition, hysteresis, etc.((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)) 
  * Cross-triggering with Logic Analyzer, Waveform Generator, Pattern Generator or external trigg((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)).
  * Sampling modes: average, decimate, min/max((Real time sampling modes are implemented in the FPGA. The ADC always works at 100MS/s. When a lower sampling rate is required, (108/N samples/sec), N ADC samples are used to build a single recorded sample, either by averaging or decimating. In the Min/Max mode, every 2N samples are used to calculate and store a pair of Min/Max values. The stored sample rate is reduced by half in Min/Max mode.))
  * Mixed signal visualization (analog and digital signals share same view pane)((In mixed signal mode, the scope and Digital I/O acquisition blocks use the same reference clock, for synchronization.)) 
  * Real-time views: FFTs, XY plots, Histograms and other((This functionality is implemented by WaveForms software in the PC, using the buffered data from the FPGA. After a acquiring a complete data buffer at the FPGA level and uploading it to the PC, the data is processed and displayed, while a new acquisition is started.))
  * Multiple math channels with complex functions. 
  * Cursors with advanced data measurements((This functionality is implemented by WaveForms software in the PC, using the buffered data from the FPGA. After a acquiring a complete data buffer at the FPGA level and uploading it to the PC, the data is processed and displayed, while a new acquisition is started.)) 
  * Captured data files can be exported in standard formats((This functionality is implemented by WaveForms software, in the PC.))
  * Scope configurations can be saved, exported and imported((This functionality is implemented by WaveForms software, in the PC.))

### 2. 任意波形发生器模拟输出

  * Channels: 2
  * Channel type: single ended
  * Resolution:	14-bit
  * Absolute Resolution(amplitude ≤1V):	166μV
  * Absolute Resolution(amplitude >1V):	665μV
  * Accuracy - typical (|Vout| ≤ 1V): ±10mV ± 0.5%
  * Accuracy - typical (|Vout| > 1V): ±25mV ± 0.5%
  * Sample rate (real time): 100MS/s((The AWG DAC always works at 100MS/s. When a lower sampling rate is required, (10<sup>8</sup>/N samples/sec), each sample is sent N times to the DAC.)) 
  * AC amplitude (max): ±5 V((The AWG output voltage is limited to ±5V. This refers to the sum of AC signal and DC offset.)) 
  * DC Offset (max): ±5 V((The AWG output voltage is limited to ±5V. This refers to the sum of AC signal and DC offset.))
  * Analog bandwidth with Discovery BNC adapter((The AWG bandwidth depends on probes. The Analog Discovery wire kit is an affordable, easy-to-use solution, but it limits the frequency, noise, and crosstalk performances. With coax probes and Analog Discovery BNC adapter, the 0.5dB AWG bandwidth is 4MHz (see [[analog_discovery_2:refmanual#figure_21|Figure 21]]).)): 12 MHz @ 3dB, 4 MHz @ 0.5dB, 1 MHz @ 0.1dB
  * Analog bandwidth with Wire Kit((The AWG bandwidth depends on probes. The Analog Discovery wire kit is an affordable, easy-to-use solution, but it limits the frequency, noise, and crosstalk performances. With coax probes and Analog Discovery BNC adapter, the 0.5dB AWG bandwidth is 4MHz (see [[analog_discovery_2:refmanual#figure_21|Figure 21]]).)): 9 MHz @ 3dB, 2.9 MHz @ 0.5dB, 0.8 MHz @ 0.1dB 
  * Slew rate (10V step): 400V/μs
  * Buffer size/channel: up to 16k samples((Default AWG buffer size is 4kSamples/channel. The WaveForms Device Manager provides alternate FPGA configuration files, with different resources allocation. With no memory allocated to the Digital I/O and reduced memory assigned to the Scope, the AWG buffer size can be 16kSamples/channel.))
  * Standard waveforms: sine, triangle, sawtooth, etc.
  * Advanced waveforms: Sweeps, AM, FM((Real time implemented in the FPGA configuration.)).
  * User-defined arbitrary waveforms: defined within WaveForms software user interface or using standard tools (e.g. Excel)((This functionality is implemented by WaveForms software, in the PC.)).
  

### 3. 逻辑分析仪

  * Channels: 16 (shared)((All digital I/O pins are always available as inputs, to be acquired and displayed in the Logic Analyzer and Static I/O. The user selects which pins are also used as outputs, by the Pattern Generator or Static I/O. When a signal is driven by both Pattern Generator and Static I/O, the Static I/O has priority, except if Static I/O attempts to drive a HiZ value.))
  * Sample rate (real time): 100MS/s
  * Buffer size/channel: up to 16K samples((Default Logic Analyzer buffer size is 4kSamples/channel. The WaveForms Device Manager provides alternate FPGA configuration files, with different resource allocation. With no memory allocated to the Scope and AWG, the Logic Analyzer buffer size can be chosen to be 16kSamples/channel.))
  * Input logic: LVCMOS (1.8V/3.3V, 5V tolerant)
  * Multiple trigger options including pin change, bus pattern, etc((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)).
  * Cross-triggering between Analog input channels, Logic Analyzer, Pattern Generator or external trigger((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)).
  * Interpreter for SPI, I2C, UART, Parallel bus((This functionality is implemented by WaveForms software in the PC, using the buffered data from the FPGA. After a acquiring a complete data buffer at the FPGA level and uploading it to the PC, the data is processed and displayed, while a new acquisition is started.)).
  * Data file import/export using standard formats((This functionality is implemented by WaveForms software, in the PC.)).


### 4. 数字模式发生器

  * Channels: 16 (shared)((All digital I/O pins are always available as inputs, to be acquired and displayed in the Logic Analyzer and Static I/O. The user selects which pins are also used as outputs, by the Pattern Generator or Static I/O. When a signal is driven by both Pattern Generator and Static I/O, the Static I/O has priority, except if Static I/O attempts to drive a HiZ value.))
  * Sample rate (real time): 100MS/s
  * Algorithmic pattern generator (no buffers used)((Real time implemented in the FPGA configuration.))
  * Custom pattern buffer/ch.: up to 16Ksamples((Default Pattern Generator buffer size is 1kSamples/channel. The WaveForms Device Manager provides alternate FPGA configuration files, with different resources allocation. With no memory allocated to the Scope and AWG, the Pattern Generator buffer size can be 16kSamples/channel.))
  * Output logic standard: LVCMOS (3.3V, 12mA)
  * Data file import/export using standard formats((This functionality is implemented by WaveForms software, in the PC.))
  * Customized visualization for signals and busses((This functionality is implemented by WaveForms software, in the PC.)).

### 5. 数字I/O

  * Channels: 16 (shared)((All digital I/O pins are always available as inputs, to be acquired and displayed in the Logic Analyzer and Static I/O. The user selects which pins are also used as outputs, by the Pattern Generator or Static I/O. When a signal is driven by both Pattern Generator and Static I/O, the Static I/O has priority, except if Static I/O attempts to drive a HiZ value.)).
  * Input logic: LVCMOS (1.8V/3.3V, 5V tolerant)
  * Output logic standard: LVCMOS (3.3V, 12mA)
  * Virtual I/O devices (buttons, switches & displays)((This functionality is implemented by WaveForms software, in the PC.)).
  * Customized visualization options available((This functionality is implemented by WaveForms software, in the PC.)).


### 6. 供电

  * Voltage range: 0.5V…5V and -0.5V…-5V((WaveForms allows setting the user voltages in the range 0V…5V respectively -0V…-5V. However, voltages below 0.5V, respectively above -0.5V might have excessive ripple and should be used with caution.)).
  * Pmax (USB powered):	500mW total((This limit results from the overall device power balance: the power available from the USB port, minus the power internally used by the device, moderated by the user  power supplies efficiency. The balance of 500mW is available for both user supplies to share.))
  * Imax (USB powered):	700mA((This limit results from the structure of each user power supply (positive and negative). It is not conditioned by the load degree of the complementary user supply.))  for each supply 
  * Pmax (AUX powered):	2.1W((This limit results from the structure of each user power supply (positive and negative). It is not conditioned by the load degree of the complementary user supply.)) for each supply
  * Imax (AUX powered):	700mA((This limit results from the structure of each user power supply (positive and negative). It is not conditioned by the load degree of the complementary user supply.)) for each supply
  * Accuracy (no load):	±10mV
  * Output impedance: 50mΩ (typical)


### 7. 网络分析仪

  * Shared instruments: Scope, AWG
  * Frequency sweep range: 1Hz to 10MHz
  * Frequency steps: 5 … 1000((This functionality is implemented by WaveForms software, in the PC.)).
  * Settable input amplitude and offset
  * Analog input records response at each frequency((This functionality is implemented by WaveForms software, in the PC.)).
  * Available diagrams:	Bode, Nichols, or Nyquist((This functionality is implemented by WaveForms software, in the PC.)).


### 8. 电压表

  * Channels (shared with scope): 2
  * Channel type: differential
  * Measurements: DC, AC, True RMS((This functionality is implemented by WaveForms software, in the PC.)).
  * Resolution:	14-bit
  * Accuracy (scale ≤0.5V/div):	±5mV
  * Accuracy (scale ≥1V/div): ±50mV
  * Input impedance: 1MΩ || 24pF
  * Input range: ±25V (±50V diff)
  * Input protected to:	±50V


#### 9. 频谱分析仪 

  * Channels (shared with scope): 2
  * Power spectrum algorithms: FFT, CZT((This functionality is implemented by WaveForms software, in the PC.)).
  * Frequency range modes: center/span, start/stop((This functionality is implemented by WaveForms software, in the PC.)).
  * Frequency scales: linear, logarithmic((This functionality is implemented by WaveForms software, in the PC.)).
  * Vertical axis options: voltage-peak, voltage-RMS, dBV and dBu((This functionality is implemented by WaveForms software, in the PC.)).
  * Windowing: options: rectangular, triangular, hamming, Cosine, and many others((This functionality is implemented by WaveForms software, in the PC.)).
  * Cursors and automatic measurements:  noise floor, SFDR, SNR, THD and many others((This functionality is implemented by WaveForms software, in the PC.)).
  * Data file import/export using standard formats((This functionality is implemented by WaveForms software, in the PC.)).


### 10. 其它特性
  * USB power option; all needed cables included. 
  * External supply option:  5V, 2.5A (not included) 5.5/2.1mm connector, positive inner pin
  * High-speed USB2 interface for fast data transfer
  * Waveform Generator output played on stereo audio jack
  * Trigger in/trigger out allows multiple instruments to be linked((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)).
  * Cross triggering between instruments((Trigger Detectors and Trigger Distribution Networks are implemented in the FPGA. This allows real time triggering and cross-triggering of different instruments within the Analog Discovery device. Using external Trigger inputs/outputs, cross-triggering between multiple Analog Discovery devices is possible.)).
  * Help screens, including contextual help((This functionality is implemented by WaveForms software, in the PC.)).
  * Instruments and workspaces can be individually configured; configurations can be exported((This functionality is implemented by WaveForms software, in the PC.)).